The present invention relates to a semiconductor chip package and to a module of semiconductor chip packages.
In the electronics industry there is a continuing need to reduce the size of electronic components. Currently, there is a trend towards the use of a third dimension i.e. the vertical dimension, both in the manufacture of silicon devices and in the way those devices are assembled on a printed circuit board.
INMOS Limited currently manufactures Transputer (computer on a chip) modules (TRAMs), which modules are stackable by the employment of redundant pins on the modules that are not connected to any circuitry. A TRAM with active circuitry on those pins can then be plugged into the redundant pins and hence connected to a mother board.
Random Access Memories (RAMs) conventionally come in Dual Inline Packages (DIPs) with an even number of pins. If a particular device requires an odd number of pins, one of the pins is normally left redundant or not connected. If this redundant pin is adjacent to one of the signals that selects the RAM, it is possible to build two different assemblies of the RAM, one which uses the normal pin for chip select (CS), and the other of which uses the adjacent pin for chip select. When a pair of one of each of these two different RAMs is stacked together, it appears on the printed circuit board as a single device with two chip select pins. The upper device has a chip select pin which is above the redundant pin of the lower device and the lower device has a chip select pin which is below a redundant pin of the upper device. A disadvantage of this arrangement is that two different assemblies of the RAM are required; one with a chip select pad on the silicon chip bonded to the normal chip select pin and another with the chip select pad bonded to the normally not connected (NC) pin.
EP-A-0157147 (IBM) discloses a stacked double density memory module using industry standard memory chips which is a modification of the known arrangement described above. On the top chip the chip select pin is bent so as not to contact the corresponding pin on the bottom chip and the upper chip select pin is connected to the no-connect,pin of the upper chip by a jumper in the form of a U-shaped strap. The no-connect pin contacts the underlying no-connect pin of the bottom chip. This arrangement also suffers from the disadvantage that two different chip assemblies are required, one with a jumper and one without a jumper. Also, one of the pins on the top chip must be bent or cut to retain the jumper.